Every silicon chip in the world begins life on a disc of silicon roughly the size of a dinner plate. Hundreds of identical rectangles are printed onto it, then a saw cuts the disc apart and each rectangle becomes a separate processor.
Cerebras built its entire business on refusing to make that cut. On August 18 the Sunnyvale company introduced the CS-4, its fourth-generation system, which puts three uncut wafers into a single rack and claims inference up to thirty times faster than production GPU systems.
A standard 300mm wafer, printed with the grid of individual chips that would normally be sawn apart. Cerebras keeps the wafer whole. Photo: Peellden, Wikimedia Commons, CC BY-SA 3.0.
The processor at the center of the CS-4 is called the Wafer Scale Engine 3 Turbo, fabricated by TSMC on a 5-nanometer process. A single one carries four trillion transistors and 900,000 cores optimized for AI arithmetic, along with 44 gigabytes of SRAM sitting directly on the wafer surface.
Three of them in one rack add up to 750 petaflops of AI compute and, more importantly, 129.6 petabytes per second of memory bandwidth. That second number is the one that explains why the design exists at all.
Generating a single token from a large language model requires reading essentially the entire model’s weights. In a conventional GPU cluster those weights live in memory stacks sitting beside the processor, and every token pays the round-trip cost of fetching them across a package boundary.
Keeping memory on the same piece of silicon as the arithmetic removes that trip. The trade is that on-wafer SRAM is fast but small — 44 gigabytes per wafer is a fraction of what a modern HBM stack holds — so very large models have to be spread across multiple wafers, which makes the link between wafers the next thing to fix.
CS-4 attacks it directly. Cerebras says wafer-to-wafer interconnect latency drops from about five microseconds to as low as two, which is what allows the system to keep generating more than 1,000 tokens per second on models exceeding ten trillion parameters instead of stalling as the model grows.
On smaller workloads the numbers get startling. Running GPT-OSS-120B, the company reports more than 4,400 tokens per second for a single user, a rate at which a full page of text appears faster than a person can register that they asked for it.
Against its own previous generation, Cerebras claims roughly double the speed and up to ten times the throughput per watt of the CS-3. Total I/O bandwidth reaches 7.2 terabits per second, and the whole thing sits on a new rack architecture the company calls Nexus.
Racks at Oak Ridge National Laboratory. The constraint on AI buildouts in 2026 is increasingly the gigawatt rather than the transistor. Photo: Oak Ridge National Laboratory, CC BY 2.0.
Nexus is where the announcement stops being a chip story and becomes a plumbing story. Each wafer now lives inside a rear-mounted Wafer-Scale Backpack, a self-contained assembly that folds power conversion, direct liquid cooling, high-speed I/O and control electronics into a three-dimensional package built around the silicon.
The practical consequences are mundane and significant. The backpack uses fifty percent fewer components than the previous system and sixty percent more automated manufacturing, and decoupling compute from the power supplies cuts installation time from days to hours.
The power engineering carries the performance claim. By moving power conversion roughly a hundred times closer to the processor than a conventional GPU board does, Cerebras nearly eliminates board-level loss and can push twice as much power into the wafer, which is what buys the higher clock and the faster tokens.
The company also built the CS-4 to admit that it should not do everything. Inference has two distinct phases: prefill, where the model digests the incoming prompt, and decode, where it produces the answer one token at a time. Prefill rewards raw parallel throughput; decode rewards low latency.
So CS-4 natively supports disaggregated inference, in which a separate engine handles prefill and hands the prepared model state to Cerebras for decoding. The named partners for the prefill half are AMD’s Helios platform and AWS Trainium, connected over standards-based RoCE v2 RDMA on Ethernet, with switch-free Direct Wafer Links reserved for Cerebras-to-Cerebras traffic.
Why all this effort for speed alone? Because in 2026 speed has quietly become the product. Reasoning models and agentic systems burn enormous numbers of tokens that the user never sees, and an assistant that deliberates for two seconds is a categorically different tool from one that deliberates for thirty.
OpenAI has already voted with its inference budget. GPT-5.3-Codex-Spark, released earlier this year, ran at more than 1,000 tokens per second on Cerebras hardware and marked OpenAI’s first production deployment on something other than Nvidia. CEO Andrew Feldman has since confirmed that GPT-5.4 runs on Cerebras, with GPT-5.5 planned.
Behind that sits a commercial agreement signed in January and reported at more than ten billion dollars, covering up to 750 megawatts of capacity for OpenAI through the end of the decade. Cerebras says it expects to be delivering 600 megawatts of compute by the end of 2027, and Feldman has promised systems four times faster with twenty times the throughput by then.
The caveats deserve equal billing. Almost every performance figure in the announcement is vendor-supplied, labeled in the company’s own charts as internal benchmarking, extrapolation or projection, and Cerebras states plainly that results vary with model architecture, context length and configuration.
The financial picture is also that of a challenger rather than an incumbent. Cerebras reported revenue of $180.1 million and an adjusted loss of $6.9 million in its most recent quarter — real money, but a rounding error beside Nvidia’s data-center business and its decade of accumulated software tooling.
It is worth noting what the CS-4 does not claim. This is a decode machine for inference, not a training platform, and Cerebras is explicitly positioning it as one component of a heterogeneous rack rather than a replacement for the GPU.
Which makes the most consequential number in the whole announcement not the 750 petaflops but the tenfold improvement in throughput per watt. The binding constraint on AI buildouts has shifted from how many transistors a company can buy to how many megawatts it can get connected, and a system that turns the same wattage into more tokens is competing on the axis that now actually matters.
First CS-4 shipments begin this quarter. The next generation, Cerebras says, could arrive as early as 2027.
